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Published on: October 23, 2018
Schottky barrier SOI-MOSFETs with high-k La(2)O(3)/ZrO(2) gate dielectrics
C Henkel1, S Abermann, O Bethge
1Vienna University of Technology, Institute for Solid State Electronics, Vienna 1040, Austria.
Abstract:
Schottky barrier SOI-MOSFETs incorporating a La(2)O(3)/ZrO(2) high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,N'-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 × 10(11) eV(-1) cm(-2), a low subthreshold slope of 70-80 mV/decade, and an I(ON)/I(OFF) current ratio greater than 2 × 10(6) are obtained.
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