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Electrical performances and structural designs of copper bonding in wafer-level three-dimensional integration
1Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan.
Abstract:
The integrity of bonded Cu interconnects in wafer-level three-dimensional integration has been investigated as the function of pattern size and density, as well as bonding process parameter. The desired pattern density coupled with the application of bonding process profile we developed gives optimal yield and alignment accuracy, and provides excellent electrical connectivity and contact resistance through the entire wafer. This result is a key milestone in establishing the manufacturability of Cu-based interconnections for 3D integration technology.
