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Related Concept Videos

Power Factor Correction01:20

Power Factor Correction

The power transmission to a factory involves the transfer of apparent power, a combination of active and reactive power. The power factor measures how effectively electrical power is converted into useful work output. The ratio of the real power (KW) that does the work to the apparent power (KVA) supplied to the circuit.
Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...
NMR Spectrometers: Radiofrequency Pulses and Pulse Sequences01:17

NMR Spectrometers: Radiofrequency Pulses and Pulse Sequences

A pulse is a short burst of radio waves distributed over a range of frequencies that simultaneously excites all the nuclei in the sample. Upon passing a radio frequency pulse along the x-axis, the nuclei absorb energy corresponding to their Larmor frequencies and achieve resonance. This shifts the net magnetization vector from the z-axis toward the transverse plane. This angle of rotation of the magnetization vector, or the flip angle, is proportional to the duration and intensity of the pulse.
Long-patch Base Excision Repair01:02

Long-patch Base Excision Repair

Since the discovery of the two BER pathways, there has been a debate about how a cell chooses one pathway over the other and the factors determining this selection. Numerous in vitro experiments have pointed out multiple determinants for the sub-pathway selection. These are:
Cascaded Op Amps01:16

Cascaded Op Amps

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Rectangular and Triangular Pulse Function01:19

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Related Experiment Videos

FPGA-Based Pulse Pileup Correction.

M D Haselman1, S Hauck, T K Lewellen

  • 1Dept. of Electrical Engineering, University of Washington, Seattle, WA 98195 USA.

IEEE Nuclear Science Symposium Conference Record. Nuclear Science Symposium
|January 10, 2012
PubMed
Summary
This summary is machine-generated.

This study introduces an all-digital pulse pileup correction algorithm for Field Programmable Gate Arrays (FPGAs) in positron emission tomography (PET) scanners. The algorithm improves data acquisition at higher count rates by mitigating signal overlap, enhancing image resolution.

Related Experiment Videos

Area of Science:

  • Medical Imaging
  • Digital Signal Processing
  • Embedded Systems Engineering

Background:

  • Modern Field Programmable Gate Arrays (FPGAs) offer high clock rates and processing power, making them suitable for complex algorithms.
  • Positron Emission Tomography (PET) scanners require efficient data acquisition systems to achieve high resolution.
  • Integrating advanced signal processing into FPGAs simplifies electronics and enhances scanner capabilities.

Purpose of the Study:

  • To develop and report on an all-digital pulse pileup correction algorithm for FPGAs in a high-resolution, small-animal PET scanner.
  • To enable the PET scanner to operate at higher count rates by mitigating data loss from overlapping scintillation signals.
  • To leverage FPGA capabilities for enhanced signal processing in next-generation PET systems.

Main Methods:

  • Development of an all-digital pulse pileup correction algorithm designed for FPGA implementation.
  • Utilization of a reference pulse within the algorithm to extract timing and energy information from pileup events.
  • Acquisition and analysis of scintillation pulses from a Zecotech Photonics MAPDN with an LFS-3 scintillator.

Main Results:

  • Demonstration of an all-digital pulse pileup correction algorithm suitable for FPGA integration.
  • Successful extraction of timing and energy information from scintillation signals even in the presence of pileup.
  • Validation of the algorithm's effectiveness using experimental data from a specific scintillator and detector.

Conclusions:

  • The developed all-digital pulse pileup correction algorithm is effective for FPGA implementation in PET scanners.
  • The algorithm enables higher count rates in PET scanners by reducing data loss due to pulse pileup.
  • This FPGA-based approach enhances signal processing capabilities, contributing to higher resolution PET imaging.