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Updated: May 25, 2026

Video-rate Scanning Confocal Microscopy and Microendoscopy
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Ultra-high-speed image signal accumulation sensor.

Takeharu Goji Etoh1, Dao Vu Truong Son, Toshiaki Koike Akino

  • 1Graduate School of Science and Engineering, Kinki University, Higashi-Osaka, Osaka 577-8502, Japan. best2010@civileng.kindai.ac.jp

Sensors (Basel, Switzerland)
|February 10, 2012
PubMed
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Researchers developed an ultra-high-speed image sensor with on-chip signal accumulation. This Image Signal Accumulation Sensor (ISAS) uses a multi-folded CCD for in situ storage, enabling high frame rates for low signal-to-noise ratio imaging.

Area of Science:

  • * Electrical Engineering
  • * Image Sensor Technology
  • * Signal Processing

Background:

  • * Averaging accumulated data is crucial for processing low signal-to-noise ratio (SNR) data, common in ultra-high-speed imaging.
  • * Existing methods often require complex post-processing for signal accumulation.

Purpose of the Study:

  • * To propose a novel architecture for an ultra-high-speed image sensor with integrated on-chip signal accumulation.
  • * To enable efficient processing of low SNR images captured at extremely high frame rates.

Main Methods:

  • * Implementation of a multi-folded charge-coupled device (CCD) within each pixel for in situ image signal storage.
  • * Achieving signal accumulation by directly connecting the first and last storage elements of the in situ storage CCD.
Keywords:
CCDCMOSISASISISaveraging techniquehigh speedimage sensorsignal accumulation

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  • * Development of simplified driving electrode configurations for two-phase and four-phase transfer CCD systems.
  • Main Results:

    • * Successful design of an ultra-high-speed image sensor capable of on-chip signal accumulation.
    • * Demonstration of simplified electrode driving schemes for multi-folded CCDs, overcoming previous complexity concerns.
    • * Introduction of the Image Signal Accumulation Sensor (ISAS) architecture.

    Conclusions:

    • * The proposed ISAS architecture effectively integrates ultra-high-speed imaging with on-chip signal accumulation.
    • * The simplified electrode configurations make the multi-folded CCD approach practical for high-performance image sensors.
    • * This technology significantly advances the processing of challenging low SNR imaging applications.