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Updated: May 13, 2026
11:13
Analysis of Contact Interfaces for Single GaN Nanowire Devices
Published on: November 15, 2013
Reducing contact resistance in graphene devices through contact area patterning
Joshua T Smith1, Aaron D Franklin, Damon B Farmer
1IBM T.J. Watson Research Center, Yorktown Heights, New York 10598, United States. joshsmit@us.ibm.com
ACS Nano
|March 12, 2013
Summary
Researchers reduced contact resistance in graphene electronics by creating cuts in graphene contacts. This "edge-contacted" method enhances carrier injection, improving device performance without extra processing steps.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Contact resistance at the metal-graphene (M-G) interface impedes graphene electronics performance.
- Carrier injection from 3D metals to 2D graphene presents unique transport challenges.
Purpose of the Study:
- To experimentally enhance carrier injection and reduce contact resistance in graphene devices.
- To investigate a novel method for improving the metal-graphene interface.
Main Methods:
- Creating strategically oriented cuts in the graphene within contact regions.
- Facilitating bonding between contact metal and graphene cut edges for "edge-contacted" injection.
- Analyzing the impact of contact annealing on the improved interface.
Main Results:
- Achieved a 32% reduction in contact resistance for Cu-contacted devices.
- Achieved a 22% reduction in contact resistance for Pd-contacted graphene transistors.
- Demonstrated reproducible enhancement in carrier injection and reduced resistance.
Conclusions:
- Graphene edge-contacting via cuts is a simple, reproducible method to lower contact resistance.
- This technique bolsters graphene device performance without additional fabrication steps.
- Contact annealing plays a crucial role in achieving these performance improvements.
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