Robust fabrication method for silicon nanowire field effect transistors for sensing applications

Area of Science:

• Nanotechnology
• Materials Science
• Electrical Engineering

Background:

• Silicon nanowire field-effect transistors (SiNW-FETs) are promising for sensing applications.
• Existing fabrication methods can be complex and lack scalability.
• There is a need for robust, manufacturable SiNW-FETs for widespread use.

Purpose of the Study:

• To demonstrate a new, top-down fabrication method for SiNW-FETs.
• To ensure the method is compatible with large-scale manufacturing using conventional techniques.
• To highlight the flexibility and potential for integration of the process.

Main Methods:

• Utilized conventional Complementary Metal Oxide Semiconductor (CMOS) processing techniques.
• Employed a separate, independent step for front oxide application, allowing flexibility.
• Integrated e-beam technology for sub-resolution feature fabrication if needed.
• Incorporated a passivation layer for surface modification and enhanced selectivity.

Main Results:

• Successfully fabricated SiNW-FETs with a simple and robust process.
• Demonstrated electrical characteristics suitable for sensor devices.
• Confirmed device reliability and a high manufacturing yield.
• The process is adaptable to various production facilities and oxide types.

Conclusions:

• The developed top-down fabrication method is suitable for large-scale production of SiNW-FETs.
• The process offers flexibility in material choice and feature size.
• The resulting devices exhibit desirable electrical properties and reliability for sensing applications.