A compact, low input capacitance neural recording amplifier.

Area of Science:

• Electrical Engineering
• Biomedical Engineering
• Microelectronics

Background:

• Conventional neural recording amplifiers face limitations due to large input load capacitance, leading to trade-offs between chip area, input capacitance, and amplifier gain.
• These limitations hinder the development of compact and efficient neural recording devices.

Purpose of the Study:

• To relax the trade-off between input capacitance, chip area, and amplifier gain in neural recording amplifiers.
• To introduce a novel amplifier architecture utilizing a clamped T-capacitor network.

Main Methods:

• Replacing the single feedback capacitor in conventional amplifiers with a clamped T-capacitor network.
• Fabricating prototype neural recording amplifiers using 0.35 μm CMOS technology.
• Characterizing amplifier performance, including gain, input capacitance, area, noise, and power consumption.

Main Results:

• The proposed amplifiers achieve comparable mid-band gain with significantly reduced input capacitance and silicon area compared to conventional designs.
• One prototype amplifier achieved 38.1-dB mid-band gain with 1.6 pF input capacitance in a 0.056 mm² area.
• The amplifier demonstrated low power consumption (6 μW) and competitive input-referred noise (13.3 μVrms).

Conclusions:

• The clamped T-capacitor network effectively relaxes the design trade-offs in neural recording amplifiers, enabling smaller, more efficient devices.
• The fabricated prototypes demonstrate the feasibility and advantages of this novel architecture for neural recording applications.
• In-vivo recordings confirm the practical utility of the developed neural amplifiers.