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High vertical yield InP nanowire growth on Si(111) using a thin buffer layer.

H A Fonseka1, H H Tan, J Wong-Leung

  • 1Department of Electronic Materials Engineering, Research School of Physics and Engineering, The Australian National University, Canberra, ACT 0200, Australia.

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Summary

We grew Indium Phosphide (InP) nanowires on Silicon (Si) substrates using a novel InP buffer layer. This method achieves over 97% vertical yield, matching InP nanowire quality on native substrates.

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Area of Science:

  • Materials Science
  • Nanotechnology
  • Semiconductor Physics

Background:

  • Indium Phosphide (InP) nanowires are crucial for optoelectronic devices.
  • Growing InP nanowires on Silicon (Si) substrates offers a cost-effective alternative to native InP substrates.
  • Developing efficient buffer layers is key to achieving high-quality InP nanowires on Si.

Purpose of the Study:

  • To demonstrate the growth of InP nanowires on Si(111) substrates utilizing a specifically engineered InP buffer layer.
  • To analyze the structural and optical properties of InP nanowires grown on the buffer layer.
  • To determine the impact of buffer layer characteristics on nanowire morphology and performance.

Main Methods:

  • Two-step buffer layer growth: initial low-temperature formation with a high V/III ratio, followed by higher-temperature growth.
  • Characterization of buffer layer polarity and crystal quality.
  • Growth of InP nanowires on the developed buffer layer.
  • Analysis of nanowire morphology, vertical yield, and optical properties.

Main Results:

  • Successfully grew InP nanowires on Si(111) with a thin InP buffer layer.
  • Achieved over 97% vertical yield for InP nanowires.
  • Nanowires exhibited morphology and optical properties comparable to those grown on native InP (111)B substrates.
  • Buffer layer crystal defects did not significantly impact nanowire properties.

Conclusions:

  • The developed two-step InP buffer layer enables high-quality InP nanowire growth on Si(111).
  • This approach provides a viable pathway for integrating InP nanowires with silicon technology.
  • The buffer layer's robustness allows for high yield and excellent performance despite minor defects.