Determination of all feasible robust PID controllers for open-loop unstable plus time delay processes with gain
1Department of Electrical Engineering, Tungnan University, Taiwan.
ISA Transactions
|January 28, 2014
Summary
This study introduces a graphical method for designing robust PID controllers for unstable processes with time delays. It ensures stability and optimal performance by identifying a feasible region for controller gains.
Area of Science:
- Control Systems Engineering
- Robust Control Theory
- Process Automation
Background:
- Open-loop unstable processes with time delays (OLUPTD) present significant control challenges.
- Ensuring robustness against gain variations and achieving desired stability margins is critical.
- Existing methods may have limitations in applicability or generality for OLUPTD systems.
Purpose of the Study:
- To propose a novel graphical method for computing robust Proportional-Integral-Derivative (PID) controllers.
- To address gain and phase margin specifications for general OLUPTD processes.
- To simultaneously guarantee robustness and optimize performance criteria like Integral Absolute Error (IAE) or Integral Squared Error (ISE).
Main Methods:
- Utilizing a virtual gain-phase margin tester compensator to ensure robust safety margins.
- Employing stability equation and parameter plane methods to define stability and gain/phase margin boundaries.
- Graphically determining the overlapping region (GPMSOR) of these boundaries to identify feasible robust PID controllers.
Main Results:
- The Gain and Phase Margin Specifications-Oriented Region (GPMSOR) is identified, characterizing all feasible robust PID controllers.
- Controller gains within the GPMSOR are optimized to minimize IAE or ISE performance criteria.
- The proposed method successfully finds optimal PID controller gains, ensuring pre-specified gain/phase margins and performance.
Conclusions:
- The developed graphical method provides a systematic approach for designing robust PID controllers for OLUPTD processes.
- Simultaneous assurance of robustness (gain/phase margins) and performance (IAE/ISE) is achieved.
- An algorithm is presented for rapid identification of the GPMSOR and optimal PID gain set selection.
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