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Writing and Low-Temperature Characterization of Oxide Nanostructures
Published on: July 18, 2014
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The interfaces of lanthanum oxide-based subnanometer EOT gate dielectrics.
Hei Wong1, Jian Zhou2, Jieqiong Zhang3
1Department of Electronic Engineering and Information Sciences, Zhejiang University, Hangzhou, China ; Department of Electronic Engineering, City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong.
Nanoscale Research Letters
|September 24, 2014
Summary
Investigating tungsten/lanthanum oxide/silicon (W/La2O3/Si) metal-oxide-semiconductor (MOS) structures reveals thermal instability at interfaces. Annealing forms interfacial layers, degrading performance and limiting equivalent oxide thickness (EOT) for future devices.
Area of Science:
- Materials Science
- Semiconductor Physics
- Nanotechnology
Background:
- Scaling metal-oxide-semiconductor (MOS) devices requires subnanometer gate dielectrics.
- Interfacial layers in high-k dielectric/Si and high-k dielectric/metal structures are critical constraints.
- Understanding these interfaces is crucial for advanced semiconductor technology.
Purpose of the Study:
- To investigate the interface bonding structures of tungsten/lanthanum oxide/silicon (W/La2O3/Si) MOS structures.
- To analyze the thermal stability of W/La2O3 and La2O3/Si interfaces.
- To determine the impact of interfacial layers on device performance and equivalent oxide thickness (EOT).
Main Methods:
- Detailed study of interface bonding structures in W/La2O3/Si MOS devices.
- Analysis of thermal annealing effects on W/La2O3 and La2O3/Si interfaces.
- Characterization of interfacial transition layers formed during annealing.
Main Results:
- Both W/La2O3 and La2O3/Si interfaces exhibit thermal instability.
- Thermal annealing leads to tungsten oxidation and a complex oxide layer at the W/La2O3 interface.
- Annealing of the La2O3/Si interface results in a thick low-k silicate layer.
Conclusions:
- The formed interfacial layers significantly degrade device performance.
- These interface layers impose a limit on the achievable equivalent oxide thickness (EOT).
- The limitations may exceed the requirements for future technology nodes.
