A 120nW 8b Sub-ranging SAR ADC with Signal-Dependent Charge Recycling for Biomedical Applications

Area of Science:

• Electrical Engineering
• Integrated Circuit Design
• Signal Processing

Background:

• Bursty signals require efficient analog-to-digital converters (ADCs) with low power consumption.
• Traditional SAR ADCs face energy inefficiencies due to repeated switching of large capacitors.

Purpose of the Study:

• To develop an energy-efficient 8-bit sub-ranging SAR ADC tailored for bursty signals.
• To reduce power consumption by minimizing capacitor switching and conversion cycles.

Main Methods:

• Implemented a modified capacitive-Digital-to-Analog Converter (CDAC) that stores and reuses the Most Significant Bit (MSB) voltage.
• Designed an 8-bit sub-ranging SAR architecture for efficient conversion of signals with long idle periods and small code spreads.
• Utilized a 0.18μm CMOS process for fabrication.

Main Results:

• Achieved total energy savings of 2.6x compared to conventional designs.
• Demonstrated a power consumption of 120nW at 0.6V and a sampling rate of 100kS/s.
• Attained a Signal-to-Noise-and-Distortion Ratio (SNDR) of 46.9dB.

Conclusions:

• The proposed modified CDAC technique significantly enhances energy efficiency in SAR ADCs for bursty signal applications.
• The developed ADC offers a compelling solution for low-power, high-performance data acquisition in scenarios with intermittent signal activity.