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Updated: Mar 18, 2026
Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
Published on: December 7, 2015
Vertically aligned CNT-Cu nano-composite material for stacked through-silicon-via interconnects
Shuangxi Sun1, Wei Mu, Michael Edwards
1SMIT Center, School of Mechanical Engineering and Automation and Institute of NanomicroEnergy, Jiading Campus, Shanghai University, 201800 Shanghai, People's Republic of China. Electronics Materials and Systems Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology, SE-412 96 Gothenburg, Sweden.
A new carbon nanotube (CNT)/copper nanocomposite offers a promising solution for 3D chip stacking. This advanced material exhibits low resistivity and a thermal expansion coefficient matching silicon, crucial for miniaturized electronic systems.
Area of Science:
- Materials Science
- Nanotechnology
- Electrical Engineering
Background:
- Miniaturization of electronic systems relies on 3D chip stacking.
- Existing fine-pitch materials for through-silicon-via (TSV) applications face limitations.
- Novel materials are needed to meet the demands of advanced packaging.
Purpose of the Study:
- To propose and characterize a novel carbon nanotube (CNT)/copper nanocomposite for 3D TSV applications.
- To evaluate the electrical and thermal properties of the proposed material.
- To assess the reliability of the nanocomposite for future electronic systems.
Main Methods:
- Fabrication of vertically aligned CNT bundles coated with copper via electroplating.
- Measurement of electrical resistivity and temperature coefficient.
- Finite element modeling and thermal cycle simulations to predict reliability.
Main Results:
- Achieved high aspect ratios (up to 300:1) for CNT/copper bundles.
- Obtained a low electrical resistivity of approximately 10⁻⁸ Ω m.
- Demonstrated a temperature coefficient half that of pure copper and a coefficient of thermal expansion (CTE) similar to silicon.
Conclusions:
- The CNT/copper nanocomposite is a highly promising material for 3D TSV applications.
- Its low resistivity and silicon-like CTE address key challenges in 3D chip stacking.
- Simulations predict excellent reliability for this advanced nanomaterial.
