Optimal Geometry Aspect Ratio of Ellipse-Shaped- Surrounding-Gate Nanowire Field Effect Transistors

Theoretically ideally round shape of the surrounding gate may not always guarantee because of limitations of the fabrication process in surrounding-gate nanowire field effect transistors (FETs). These limitations may lead to the formation of an ellipse-shaped surrounding gate with major and minor axes of different lengths. In this paper, we for the first time study the electrical characteristics of ellipse-shaped-surrounding-gate silicon nanowire FETs with different ratio of the major and minor axes. By simultaneously simulating engineering acceptable magnitudes of the threshold voltage roll-off, the drain induced barrier lowering, the subthreshold swing, and the on-/off-state current ratio, an optimal geometry aspect ratio between the channel length and the major and minor axes of the ellipse-shaped-surrounding-gate nanowire FET is concluded.