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Updated: Feb 26, 2026

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Deep Neural Networks for Image-Based Dietary Assessment
Published on: March 13, 2021
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DANoC: An Efficient Algorithm and Hardware Codesign of Deep Neural Networks on Chip.
Summary
This study introduces the Deep Adaptive Network (DAN), an efficient algorithm and hardware design for deep neural networks. DAN significantly reduces memory and computation, enabling high-accuracy image classification on embedded systems.
Area of Science:
- Computer Science
- Artificial Intelligence
- Hardware Engineering
Background:
- Deep neural networks (NNs) excel at image and video analysis but face implementation challenges in embedded systems due to high memory and computational demands.
- Existing deep belief networks can consume gigabytes of memory, leading to bandwidth and processing bottlenecks.
- Efficient deployment of NNs in resource-constrained environments remains a critical research area.
Purpose of the Study:
- To propose an algorithm and hardware codesign for efficient deep neural computation in embedded systems.
- To address the memory and computational challenges posed by deep NNs.
- To develop a system that maintains classification accuracy while optimizing resource utilization.
Main Methods:
- Introduced a hardware-oriented deep learning algorithm, the Deep Adaptive Network (DAN), which exploits neural connection sparsity.
- Developed an efficient sparse-mapping-memory-based hardware architecture (DANoC) for optimized computation.
- Implemented a codesign approach that brings computation and communication closer, minimizing data transfer.
Main Results:
- The proposed algorithm achieves up to 99.9% savings in memory and computational resources by adaptively removing connections and using binary representations.
- The DANoC hardware architecture effectively utilizes algorithmic optimizations, reducing power-hungry parameter transfers.
- Experiments on image classification benchmarks demonstrated that DANoC achieves competitive accuracy and superior efficiency compared to state-of-the-art methods.
Conclusions:
- The Deep Adaptive Network algorithm and DANoC hardware codesign offer a viable solution for deploying deep neural networks efficiently on embedded systems.
- Significant resource savings are achievable without compromising classification performance.
- This approach paves the way for advanced AI capabilities in power- and memory-constrained devices.

