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Updated: Feb 19, 2026

The Frequency Domain Thermoreflectance Technique for Thermal Property Measurements
Published on: December 5, 2025
Spatially Resolved Thermometry of Resistive Memory Devices
Eilam Yalon1, Sanchit Deshmukh1, Miguel Muñoz Rojo1
1Department of Electrical Engineering, Stanford University, Stanford, CA, 94305, USA.
Accurate nanoscale temperature measurements in resistive and phase-change memory (RRAM and PCM) are enabled by Raman thermometry and scanning thermal microscopy (SThM). These techniques reveal critical thermal interface resistances impacting device performance.
Area of Science:
- Materials Science
- Nanotechnology
- Solid State Physics
Background:
- Resistive and phase-change memory (RRAM and PCM) operation relies on localized self-heating effects.
- Accurate nanoscale thermometry is crucial but challenging for studying these effects.
Purpose of the Study:
- To demonstrate the application of Raman thermometry and scanning thermal microscopy (SThM) for high-resolution nanoscale temperature measurements in memory devices.
- To investigate the thermal properties and interfaces of HfO2, TiO2, and Ge2Sb2Te5 (GST) films.
Main Methods:
- Utilized Raman thermometry to obtain temperature-dependent spectra of HfO2, TiO2, and GST films.
- Employed scanning thermal microscopy (SThM) for direct measurement of temperature profiles in lateral PCM devices.
- Analyzed thermal boundary resistance and effective thermopower at material interfaces.
Main Results:
- Reported temperature-dependent Raman spectra for key memory materials.
- Measured temperature profiles in lateral PCM devices, highlighting the impact of electrical and thermal interfaces.
- Quantified thermal boundary resistance at GST-SiO2 interfaces (28 ± 8 m²K/GW) and effective thermopower at GST-Pt interfaces (350 ± 50 µV/K).
Conclusions:
- Raman thermometry and SThM are effective tools for nanoscale thermometry in memory devices.
- Thermal interfaces significantly influence the operation of RRAM and PCM devices.
- The study provides a foundation for applying these techniques to nanoscale and vertical resistive memory devices.
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