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Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

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Published on: April 21, 2016

Steep-Slope WSe₂ Negative Capacitance Field-Effect Transistor.

Mengwei Si¹, Chunsheng Jiang¹, Wonil Chung¹

¹School of Electrical and Computer Engineering and Birck Nanotechnology Center , Purdue University , West Lafayette , Indiana 47907 , United States.

|May 8, 2018

Summary

This summary is machine-generated.

Researchers developed new P-type two-dimensional steep-slope negative capacitance field-effect transistors using WSe2 and ferroelectric hafnium zirconium oxide. These transistors achieve a subthreshold slope below 60 mV/dec, demonstrating significant improvements in performance.

Keywords:

Tungsten diselenide ferroelectric oxide internal metal gate negative capacitance steep slope

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Area of Science:

Materials Science
Condensed Matter Physics
Semiconductor Device Physics

Background:

Negative capacitance effect in ferroelectric materials offers a pathway to overcome fundamental limits in transistor switching.
Two-dimensional (2D) materials like WSe2 are promising for next-generation electronics due to their unique electronic properties.
Steep-slope transistors are crucial for low-power electronics, but achieving sub-60 mV/dec subthreshold slope remains challenging.

Purpose of the Study:

To demonstrate the first P-type two-dimensional steep-slope negative capacitance field-effect transistors (NCFETs).
To investigate the impact of ferroelectric integration on WSe2 transistor performance.
To explore the underlying mechanisms of internal amplification and negative differential resistance in these devices.

Main Methods:

Fabrication of WSe2-based NCFETs utilizing a ferroelectric hafnium zirconium oxide gate dielectric.
Incorporation of F4-TCNQ as a p-type dopant to enhance hole transport and suppress leakage.
Comparative analysis of NCFETs with and without internal metal gate structures.

Main Results:

Achieved subthreshold slope (SS) significantly below the Boltzmann limit (< 60 mV/dec), reaching as low as 14.4 mV/dec at room temperature.
Observed internal amplification (approximately 10x) attributed to the negative capacitance effect.
Demonstrated negative differential resistance (NDR) at room temperature, linked to the negative capacitance-induced negative drain-induced-barrier-lowering (NIBL) effect.

Conclusions:

The integration of ferroelectric HZO with WSe2 channels enables highly efficient P-type steep-slope NCFETs.
The observed internal amplification and NDR highlight the potential of 2D material NCFETs for advanced electronic applications.
This work provides a significant advancement in the development of low-power, high-performance semiconductor devices.