High-Performance Mixed-Signal Neurocomputing With Nanoscale Floating-Gate Memory Cell Arrays.

Area of Science:

• Nanoelectronics
• Neuromorphic Computing
• Nonvolatile Memory

Background:

• Floating-gate devices offer potential for analog and mixed-signal neuromorphic computing.
• Previous practical implementations were limited by large cell sizes.
• Optimized embedded nonvolatile floating-gate cells are key to overcoming these limitations.

Purpose of the Study:

• To report a prototype neuromorphic network utilizing highly optimized floating-gate cells.
• To demonstrate the feasibility of compact and efficient neuromorphic hardware.
• To evaluate the performance of the network on a standard benchmark.

Main Methods:

• Redesigning cells from a commercial 180-nm NOR flash memory.
• Fabricating a $28 imes 28$ binary-input, ten-output, three-layer neuromorphic network.
• Testing the network's classification fidelity, speed, and energy efficiency.

Main Results:

• Achieved 94.7% classification fidelity on the Modified National Institute of Standards and Technology benchmark.
• Demonstrated sub-1-$\mu$s classification time and sub-20-nJ energy consumption per pattern.
• The entire circuit occupies less than 1 mm².

Conclusions:

• The prototype demonstrates a significant advancement in neuromorphic computing hardware.
• The optimized floating-gate cells enable high performance in a compact area.
• Future technology scaling promises substantial improvements in speed and energy efficiency.