Accurate FPGA-Based Velocity Measurement with an Incremental Encoder by a Fast Generalized Divisionless MT-Type...

Area of Science:

• Robotics and Control Systems
• Embedded Systems Engineering
• Signal Processing

Background:

• Accurate velocity estimation is critical for advanced motion control, particularly in robotics.
• Conventional MT-type velocity estimation methods, while effective, are computationally intensive due to division operations.
• These computational demands hinder efficient implementation on resource-constrained Field-Programmable Gate Array (FPGA) platforms.

Purpose of the Study:

• To develop a novel, divisionless MT-type velocity estimation algorithm.
• To reduce the computational complexity and FPGA resource requirements for velocity estimation.
• To maintain or improve velocity estimation accuracy compared to conventional methods.

Main Methods:

• Development of a divisionless MT-type algorithm utilizing only addition, subtraction, and multiplication.
• Implementation of the algorithm on an experimental FPGA platform.
• Validation of the algorithm's stability across a wide speed range.

Main Results:

• The proposed divisionless algorithm achieves velocity estimation accuracy comparable to the conventional MT method.
• Significant reduction in FPGA resource utilization due to the elimination of division operations.
• Fast execution time, providing output within a few clock cycles.
• Demonstrated stability of the estimation process across various speeds.

Conclusions:

• The divisionless MT-type algorithm provides an efficient and accurate solution for velocity estimation using incremental encoders.
• This method is well-suited for low-cost FPGA-based control platforms in applications like robotics.
• The algorithm offers a practical alternative to conventional methods, enhancing performance and reducing hardware costs.