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Published on: July 18, 2025
Multilevel Resistive Switching in P-N Heterostructure Memory
Lei Zhang1, Liancheng Wang1, Xiaoning Zhao2
1State Key Laboratory of High Performance Complex Manufacturing, College of Mechanical and Electrical Engineering, Central South University, Changsha 410083, China.
Abstract:
High storage density is an important requirement for resistive random access memory (RRAM) devices. Multilevel resistive switching (RS) in RRAMs does not require much change to current technologies compared with device size reduction and 3D integration. Herein, five stable resistance states can be obtained in a Pt/p-NiO/n+-Si memory device by controlling the current compliance (CC). The RS mechanism can be attributed to the formation and rupture of localized conducting filaments (CFs) in an NiO film. The conductivity of the low resistance states (LRS) is determined through the combined action of the P-N junction and localized CFs. The CC can be used to effectively modulate the formation of localized CFs and junction resistance. Importantly, different LRS have large differences in resistance values, resulting in multilevel memory. A model is suggested and discussed to account for the observed multilevel memory operation.
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