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Updated: Jan 31, 2026

Fabrication of Uniform Nanoscale Cavities via Silicon Direct Wafer Bonding
Published on: January 9, 2014
InGaAs FinFETs Directly Integrated on Silicon by Selective Growth in Oxide Cavities
Clarissa Convertino1, Cezar Zota2, Heinz Schmid3
1IBM Research GmbH Zürich, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland. ino@zurich.ibm.com.
Abstract:
III-V semiconductors are being considered as promising candidates to replace silicon channel for low-power logic and RF applications in advanced technology nodes. InGaAs is particularly suitable as the channel material in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), due to its high electron mobility. In the present work, we report on InGaAs FinFETs monolithically integrated on silicon substrates. The InGaAs channels are created by metal⁻organic chemical vapor deposition (MOCVD) epitaxial growth within oxide cavities, a technique referred to as template-assisted selective epitaxy (TASE), which allows for the local integration of different III-V semiconductors on silicon. FinFETs with a gate length down to 20nm are fabricated based on a CMOS-compatible replacement-metal-gate process flow. This includes self-aligned source-drain n⁺ InGaAs regrown contacts as well as 4 nm source-drain spacers for gate-contacts isolation. The InGaAs material was examined by scanning transmission electron microscopy (STEM) and the epitaxial structures showed good crystal quality. Furthermore, we demonstrate a controlled InGaAs digital etching process to create doped extensions underneath the source-drain spacer regions. We report a device with gate length of 90 nm and fin width of 40 nm showing on-current of 100 µA/µm and subthreshold slope of about 85 mV/dec.
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