Engineering High- k/SiGe Interface with ALD Oxide for Selective GeO _x Reduction.

Area of Science:

• Materials Science
• Semiconductor Physics
• Nanotechnology

Background:

• High-mobility SiGe channels are essential for next-generation complementary metal-oxide-semiconductor (CMOS) technology.
• Electronic defects at the high-k gate oxide/SiGe interface, particularly those induced by GeOx, hinder device performance.
• An SiO(x)-rich interlayer is known to reduce interface defect density, but the mechanism involving Al(2)O(3) and HfO(2) remains unclear.

Purpose of the Study:

• To investigate the mechanism by which Al(2)O(3) insertion into HfO(2) gate oxides reduces defect density at the Al(2)O(3)/SiGe interface.
• To understand the role of Al(2)O(3) in forming a low-defect interface for advanced CMOS applications.

Main Methods:

• Atomic Layer Deposited (ALD) Al(2)O(3) was inserted into or on top of ALD HfO(2) gate oxides on SiGe.
• Defect density was quantified using impedance measurements.
• Interface chemical and physical structures were analyzed using high-resolution scanning transmission electron microscopy (HR-STEM) and electron energy loss spectroscopy (EELS).

Main Results:

• Compositional analysis confirmed an SiO(x)-rich interlayer at both Al(2)O(3)/SiGe and HfO(2)/SiGe interfaces upon Al(2)O(3) insertion.
• The results indicate that Al(2)O(3) insertion promotes the decomposition of GeO(x) at the interface, forming a passivating SiO(x) layer.
• Nanolaminate gate oxide chemistry is complex, involving precursor diffusion and reaction during ALD, not just layer-by-layer deposition.

Conclusions:

• Al(2)O(3) insertion effectively suppresses electronic defects at the SiGe interface by inducing GeO(x) decomposition and forming an SiO(x)-rich layer.
• Remote ALD (oxide ALD on top of the gate oxide) is a viable strategy to mitigate interface defects in scaled CMOS devices via oxygen scavenging.
• The findings highlight the importance of understanding diffusion and reaction mechanisms in ALD for optimizing gate stack engineering.