Implementation of a Depth from Light Field Algorithm on FPGA.

Area of Science:

• Computer Vision
• Hardware Acceleration
• Image Processing

Background:

• Light fields capture scene intensity across rays, enabling depth extraction.
• Processing light-field data demands significant computational resources.
• Advancements in parallel hardware, like FPGAs, facilitate processing of large datasets.

Purpose of the Study:

• To propose two FPGA hardware designs for computing disparity maps from light-field data.
• To optimize computation by performing calculations during data read-in.
• To evaluate the accuracy and performance of the proposed designs.

Main Methods:

• Developed two hardware designs with a common construction block for disparity map computation.
• Implemented serial and view-parallel data input strategies.
• Conducted experiments using synthetic and real light-field data, including fixed-point arithmetic analysis.

Main Results:

• Achieved disparity map computation with results produced within a few clock cycles post read-in.
• Demonstrated comparable performance to Central Processing Units (CPUs).
• Outperformed embedded processors in performance benchmarks.

Conclusions:

• The proposed FPGA designs offer efficient hardware acceleration for light-field disparity map computation.
• The designs provide a viable alternative to traditional CPU-based processing for real-time applications.
• Further analysis of performance against existing literature designs is provided.