Cryogenic Memory Architecture Integrating Spin Hall Effect based Magnetic Memory and Superconductive Cryotron Devices

Area of Science:

• Materials Science
• Computer Engineering
• Quantum Computing

Background:

• Exascale computing faces challenges in minimizing energy consumption for memory and interconnects.
• Superconducting computing requires high-density, high-speed, and power-efficient memory operating at cryogenic temperatures.
• Existing memory technologies struggle to meet the demands of cryogenic environments.

Purpose of the Study:

• To demonstrate a novel cryogenic memory cell suitable for exascale and quantum computing.
• To address the limitations of current memory solutions in cryogenic computing architectures.
• To develop a power-efficient and high-performance memory element for 4K operation.

Main Methods:

• Fabrication of a memory cell array using non-volatile magnetic tunnel junctions (MTJs).
• Integration of MTJs with superconducting heater-cryotron bit-select elements.
• Characterization of memory cell switching energy and error rates at 4 Kelvin.
• Evaluation of a 4x4 array for addressing capabilities and bit-select error rates.

Main Results:

• Achieved a write energy of approximately 8 picojoules per bit.
• Demonstrated reliable switching with write error rates below 10^-6 for individual cells.
• Confirmed full addressing capability in a 4x4 array with bit-select error rates of 10^-6.
• Overhead power consumption for bit-select elements estimated at 30%.

Conclusions:

• The demonstrated cryogenic memory cell is a significant step towards a full cryogenic memory architecture.
• This technology targets energy and performance specifications for superconducting high-performance and quantum computing.
• The memory array shows promise for applications requiring substantial memory resources at 4K.