SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

Area of Science:

• Computer Science
• Materials Science
• Electrical Engineering

Background:

• Von Neumann architecture's separation of computation and storage creates a 'Memory Wall' bottleneck.
• Existing Logic-in-Memory (LIM) approaches improve computation but sacrifice storage functionality.
• A complementary method is needed for storage systems that enables simultaneous computation and storage.

Purpose of the Study:

• To propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology.
• To demonstrate SLIM bitcells capable of both memory and logic operations.
• To evaluate the performance and energy efficiency of SLIM for real-world applications.

Main Methods:

• Developed novel SLIM bitcells using non-filamentary bilayer analog OxRAM devices with NMOS transistors.
• Designed programming schemes, array-level implementations, and controller architectures for SLIM.
• Analyzed SLIM performance for Sobel Edge Detection and Binary Neural Network-Multi Layer Perceptron (BNN-MLP) applications.

Main Results:

• Demonstrated SLIM bitcells (1T-1R/2T-1R) capable of simultaneous memory and logic operations.
• Achieved significant Energy Delay Product (EDP) savings: ~75x for 1T-1R and ~40x for 2T-1R in edge detection.
• Observed EDP savings of ~3.5x for 1T-1R and ~1.6x for 2T-1R in BNN-MLP.
• Reported ~780x EDP savings due to reduced data transfer between CPU and memory.

Conclusions:

• SLIM offers a complementary approach to existing LIM techniques, enhancing storage-side digital systems.
• The proposed SLIM methodology effectively integrates computation within memory arrays without compromising storage.
• SLIM demonstrates substantial energy and performance benefits for demanding applications like image processing and neural networks.