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    This study presents a novel analog front-end (AFE) ASIC for wearable electroencephalography (EEG) recording, combining chopping stabilization (CS) and time-division-multiplexing (TDM) to enhance performance and reduce power consumption.

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    Area of Science:

    • Biomedical Engineering
    • Integrated Circuit Design
    • Wearable Technology

    Background:

    • Wearable electroencephalography (EEG) recording demands compact, low-power analog front-end (AFE) integrated circuits (ICs).
    • Existing AFEs often struggle with input-referred noise and common-mode rejection ratio (CMRR) in multi-channel systems.
    • Reducing chip size and power consumption are critical for wearable applications.

    Purpose of the Study:

    • To develop a multi-channel AFE ASIC for wearable EEG applications.
    • To improve input-referred noise and system-level CMRR using a unified TDM/CS approach.
    • To reduce chip size and power consumption through shared second-stage amplification.

    Main Methods:

    • A multi-channel AFE ASIC was designed integrating chopping stabilization (CS) and time-division-multiplexing (TDM).
    • Dual feedback loops were incorporated for input impedance boosting and electrode offset cancellation.
    • The AFE was implemented using a 0.18-μm CMOS process.

    Main Results:

    • The AFE achieved an input-referred noise of 0.63 μVrms (0.5 Hz-100 Hz).
    • Input impedance was boosted to 560 MΩ at 50 Hz.
    • Measured amplifier intrinsic CMRR was 89 dB, and system-level AFE CMRR was 82 dB.
    • The AFE demonstrated low power consumption of 24 μW at a 1 V supply.

    Conclusions:

    • The proposed TDM/CS structure effectively enhances noise performance and CMRR for multi-channel wearable EEG AFEs.
    • The integrated design significantly reduces chip size and power consumption, making it suitable for wearable devices.
    • The developed AFE meets key performance metrics for advanced EEG monitoring applications.