Critical pattern selection method for full-chip source and mask optimization.

Area of Science:

• Integrated Circuit Manufacturing
• Lithography Technology
• Computational Lithography

Background:

• Source and Mask Optimization (SMO) is crucial for integrated circuit manufacturing at 2X nm nodes and beyond.
• Full-chip SMO is computationally expensive, leading to its application on selected critical patterns.
• Existing pattern selection methods aim to balance performance and computational demands.

Purpose of the Study:

• To propose a novel diffraction-based pattern selection method for full-chip SMO.
• To enable efficient SMO application by optimizing pattern selection.
• To reduce computational expense while maintaining manufacturing performance.

Main Methods:

• Describing diffraction-signatures using widths in eight directions.
• Designing coverage rules for diffraction-signatures.
• Implementing a diffraction-signature grouping method and pattern selection strategy.

Main Results:

• The proposed method effectively selects critical patterns for SMO.
• Simulations using ASML's Tachyon software validate the method's effectiveness.
• The approach balances computational cost and performance for full-chip SMO.

Conclusions:

• The novel diffraction-based pattern selection method is a valid and efficient approach for full-chip SMO.
• This technique facilitates the application of SMO in advanced integrated circuit manufacturing.
• The method offers a practical solution for computational challenges in lithography.