A Hardware Pseudo-Random Number Generator Using Stochastic Computing and Logistic Map

Area of Science:

• Computer Engineering
• Cryptography
• Chaos Theory

Background:

• Chaotic maps offer alternative methods for pseudo-random number generation.
• Hardware implementations of pseudo-random number generators (PRNGs) are crucial for secure applications.
• Digital chaos degradation is a challenge in implementing chaotic maps.

Purpose of the Study:

• To propose an efficient hardware pseudo-random number generator (PRNG) based on an optimized chaotic map.
• To reduce hardware utilization while maintaining robust security performance.
• To validate the generated pseudo-random numbers using standard statistical tests.

Main Methods:

• Optimized a one-dimensional logistic map using perturbation operations.
• Employed stochastic computing for hardware PRNG design.
• Implemented the proposed PRNG on a Field Programmable Gate Array (FPGA) device.

Main Results:

• The optimized chaotic map demonstrated good security performance.
• Generated pseudo-random numbers passed the TestU01 and NIST SP 800-22 tests.
• Achieved an 89% reduction in hardware resource utilization compared to conventional methods.

Conclusions:

• The proposed hardware PRNG offers an efficient and secure solution.
• Perturbation operations effectively mitigate digital chaos degradation.
• The design presents a significant advancement in low-resource, high-performance PRNGs.