Cavity-BOX SOI: Advanced Silicon Substrate with Pre-Patterned BOX for Monolithic MEMS Fabrication

Area of Science:

• Materials Science
• Microfabrication Engineering
• Nanotechnology

Background:

• Silicon on Insulator (SOI) wafers with customer-defined cavities simplify Microelectromechanical Systems (MEMS) fabrication.
• Existing methods for MEMS fabrication can be complex, especially for devices with intricate geometries.

Purpose of the Study:

• To present a novel cavity buried oxide (BOX) SOI substrate (cavity-BOX) with a patterned BOX layer.
• To demonstrate the utility of cavity-BOX as a buried hard-etch mask for MEMS fabrication.

Main Methods:

• Development of a cavity-BOX SOI substrate with a patterned BOX layer.
• Utilizing the patterned BOX as a buried microchannels network, stop layer, or hard-etch mask.
• Backside wafer etching using cleanroom microfabrication compatible tools and methods.

Main Results:

• The cavity-BOX enables accurate patterning of the device layer during backside etching.
• Demonstrated successful fabrication of a deep brain stimulation (DBS) device with precisely defined silicon islands.
• Simplified and improved robustness in thinning and separating silicon islands for complex MEMS structures.

Conclusions:

• Cavity-BOX wafers offer enhanced design freedom and simplified fabrication processes for MEMS.
• This technology advances the manufacturing of MEMS devices, particularly those with complex geometries and added functionality.
• Cavity-BOX is a promising substrate for next-generation MEMS devices.