Investigation on Ge_0.8Si_0.2-Selective Atomic Layer Wet-Etching of Ge for Vertical Gate-All-Around Nanodevice

For the formation of nano-scale Ge channels in vertical Gate-all-around field-effect transistors (vGAAFETs), the selective isotropic etching of Ge selective to Ge_0.8Si_0.2 was considered. In this work, a dual-selective atomic layer etching (ALE), including Ge_0.8Si_0.2-selective etching of Ge and crystal-orientation selectivity of Ge oxidation, has been developed to control the etch rate and the size of the Ge nanowires. The ALE of Ge in p⁺-Ge_0.8Si_0.2/Ge stacks with 70% HNO₃ as oxidizer and deionized (DI) water as oxide-removal was investigated in detail. The saturated relative etched amount per cycle (REPC) and selectivity at different HNO₃ temperatures between Ge and p⁺-Ge_0.8Si_0.2 were obtained. In p⁺-Ge_0.8Si_0.2/Ge stacks with (110) sidewalls, the REPC of Ge was 3.1 nm and the saturated etching selectivity was 6.5 at HNO₃ temperature of 20 °C. The etch rate and the selectivity were affected by HNO₃ temperatures. As the HNO₃ temperature decreased to 10 °C, the REPC of Ge was decreased to 2 nm and the selectivity remained at about 7.4. Finally, the application of ALE in the formation of Ge nanowires in vGAAFETs was demonstrated where the preliminary I_d-V_ds output characteristic curves of Ge vGAAFET were provided.