Seamless multi-reticle photonics.

Area of Science:

• Photonics
• Integrated Circuits
• Optical Engineering

Background:

• Moore's Law drives electronic circuit scaling, but photonic component size is limited by light's wavelength.
• High-complexity photonic integrated circuits (PICs) exceed single reticle area capacity.
• Scaling challenges hinder advanced applications like petabit transceivers and quantum computers.

Purpose of the Study:

• To develop a novel method for stitching photonic integrated circuits (PICs) across multiple reticles.
• To overcome the area limitations imposed by single-reticle fabrication in photonics.
• To enable the seamless scaling of large-scale PICs beyond current manufacturing constraints.

Main Methods:

• Overlaying and widening waveguides in adjacent reticles to create smooth transitions between misaligned exposures.
• Fabrication and characterization of stitched waveguides in Silicon Nitride (SiN).
• Extension of the design to silicon channel waveguides for performance prediction.

Main Results:

• Achieved ultralow stitching loss of 0.0004 dB in SiN waveguides.
• Demonstrated a stitched delay line of 23 meters in length.
• Predicted a 50-fold reduction in loss or footprint for silicon channel waveguides compared to multimode methods.

Conclusions:

• The novel waveguide stitching approach enables large-scale PICs to scale beyond the single-reticle limit.
• This technique offers a pathway to significantly reduce loss and footprint in future photonic devices.
• Facilitates the development of complex PICs for advanced applications in communication and computing.