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Gate-all-around nanowire vertical tunneling FETs by ferroelectric internal voltage amplification

Narasimhulu Thoti1,2,3, Yiming Li1,2,3,4,5

  • 1Parallel and Scientific Computing Laboratory, National Yang Ming Chiao Tung University, Hsinchu 30010, Taiwan.

Nanotechnology
|October 8, 2021
PubMed

Keywords:
Hf0.5Zr0.5O2Si0.6Ge0.4gate-all-aroundinternal voltagenanowireoptimized metal–ferroelectric–semiconductorvertical tunneling

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