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Published on: April 12, 2018
Simultaneously Estimating Process Variation Effect, Work Function Fluctuation, and Random Dopant Fluctuation of
Sekhar Reddy Kola1,2, Yiming Li1,2,3,4,5,6,7
1Parallel and Scientific Computing Laboratory, College of Electrical and Computer Engineering, National Yang Ming Chiao Tung University, 1001 Ta-Hsueh Rd., Hsinchu 300093, Taiwan.
Abstract:
We systematically investigate the combined impact of process variation effects (PVEs), metal gate work function fluctuation (WKF), and random dopant fluctuation (RDF) on the key electrical characteristics of sub-1-nm technology node gate-all-around silicon nanosheet complementary field-effect transistors (GAA Si NS CFETs). Through comprehensive statistical analysis, we reveal that the interplay of these intrinsic and extrinsic sources of variability induces significant fluctuations in the off-state leakage current across both N-/P-FETs in GAA Si NS CFETs. The sensitivity to process-induced variability is found to be particularly pronounced in the P-FETs, primarily due to the enhanced parasitic conduction associated with the bottom nanosheet channel. Given the correlated nature of PVE, WKF, and RDF factors, the statistical sum (RSD) of the fluctuation for each factor is overestimated by less than 50% compared with the simultaneous fluctuations of PVE, WKF, and RDF factors. Furthermore, although the static power dissipation remains relatively small compared to dynamic and short-circuit power components, it exhibits the largest relative fluctuation (approximately 82.1%), posing critical challenges for low-power circuit applications. These findings provide valuable insights into the variability-aware design and optimization of GAA NS CFET device fabrication processes, as well as the development of robust and reliable CFET-based integrated circuits for next-generation technology nodes.
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