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High-Throughput Hardware for Real-Time Spike Overlap Decomposition in Multi-Electrode Neuronal Recording Systems
Jelena Dragas1, David Jäckel1, Felix Franke1
1ETH Zurich, Department of Biosystems Science and Engineering, Basel, Switzerland.
IEEE International Symposium on Circuits and Systems Proceedings. IEEE International Symposium on Circuits and Systems
|January 6, 2022
Summary
This study presents a novel hardware device for real-time spike sorting, significantly reducing errors and latency in dense neuronal recordings. The optimized system is ideal for brain-machine interfaces and large-scale neural network analysis.
Area of Science:
- Neuroscience
- Biomedical Engineering
- Computer Engineering
Background:
- Spike overlaps in dense neuronal recordings complicate accurate spike sorting.
- Real-time, low-latency spike sorting is crucial for brain-machine interfaces and in vivo neuronal dynamics studies.
- Existing algorithms struggle with the high throughput and low latency demands of modern multi-electrode recording systems.
Purpose of the Study:
- To develop a hardware device for real-time processing of pairwise spike overlaps.
- To optimize a spike sorting algorithm for high-throughput, low-latency hardware implementation.
- To enable accurate spike sorting in large neuronal networks for closed-loop experiments.
Main Methods:
- Designed and implemented a novel hardware architecture for real-time spike overlap processing.
- Optimized a previously published spike sorting algorithm for hardware acceleration.
- Verified the hardware architecture on a Field-Programmable Gate Array (FPGA) platform.
Main Results:
- Achieved real-time processing of pairwise spike overlaps.
- Demonstrated low spike sorting error rates (0.05) for overlapping spikes.
- Attained a low execution latency of 2.75 ms.
Conclusions:
- The developed hardware device effectively addresses the challenges of spike sorting in dense neuronal networks.
- The system's low latency and high accuracy make it suitable for real-time applications like closed-loop experiments.
- This hardware-accelerated approach facilitates advanced neuroscience research and brain-machine interface development.
