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Related Experiment Video

Updated: Oct 2, 2025

Assembly and Characterization of Biomolecular Memristors Consisting of Ion Channel-doped Lipid Membranes

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Synapse-Neuron-Aware Training Scheme of Defect-Tolerant Neural Networks with Defective Memristor Crossbars.

Jiyong An¹, Seokjin Oh¹, Tien Van Nguyen¹

¹School of Electrical Engineering, Kookmin University, Seoul 02707, Korea.

|February 25, 2022

Summary

This study introduces a novel memristor crossbar training scheme to improve AI hardware performance despite manufacturing defects. The new method optimizes neural network accuracy and reduces hardware overhead by intelligently grouping and training defective columns.

Keywords:

defect-tolerant neural networks defective memristor crossbars memristor defects neuromorphic synapse-neuron-aware training

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Area of Science:

Materials Science
Computer Engineering
Artificial Intelligence

Background:

Complementary Metal-Oxide-Semiconductor (CMOS) systems face limitations for advanced AI hardware.
Memristor crossbars offer potential for faster, more energy-efficient computing but suffer from manufacturing defects.
Immature fabrication technology hinders the widespread adoption of memristor-based computing systems.

Purpose of the Study:

To develop a defect-tolerant training scheme for memristor crossbars.
To simultaneously optimize neural network performance and defect map size.
To address malfunctions in neural networks caused by fabrication-related defects.

Main Methods:

A novel crossbar training scheme combining synapse-aware and neuron-aware approaches.
Categorization of memristor crossbar columns into severely-defective, moderately-defective, and normal groups.
Group-based training considering the trade-off between network performance and hardware overhead.

Main Results:

The proposed scheme improves network performance beyond purely synapse-aware or neuron-aware methods.
Achieved superior performance on the MNIST dataset with a 10% defect rate.
Demonstrated reduced memory size compared to synapse-aware methods, with a 3.1% smaller normalized memory size when 138 columns were trained.

Conclusions:

The proposed group-based, combined synapse- and neuron-aware training scheme effectively mitigates the impact of memristor fabrication defects.
This approach enhances neural network performance while minimizing hardware burden, paving the way for more robust AI hardware.
The method offers a practical solution for improving the yield and reliability of memristor-based computing systems.