Area-Efficient Mapping of Convolutional Neural Networks to Memristor Crossbars Using Sub-Image Partitioning.

Area of Science:

• Hardware acceleration for AI
• Neuromorphic computing
• Edge artificial intelligence (AI)

Background:

• Memristor crossbars offer energy and area savings for edge AI hardware compared to conventional CMOS circuits.
• Convolution is a key neural network operation that requires image partitioning for memristor crossbar implementation.
• Line resistance issues necessitate small-sized unit crossbars (128x128 or 256x256) for convolution operations.

Purpose of the Study:

• To analyze and compare different convolution schemes (3D, 2D, 1D kernels) for memristor crossbar-based neural networks.
• To evaluate the trade-offs between neural network performance and overlapping overhead for various kernel types.
• To determine the optimal convolution strategy for efficient edge intelligence hardware.

Main Methods:

• Simulation of neural networks employing different convolution kernel types (3D, 2D, 1D, and combined 2D+1D).
• Analysis of sub-image convolution mapping onto unit memristor crossbars.
• Performance evaluation using the CIFAR-10 dataset to measure rate loss and crossbar count.

Main Results:

• 2D + 1D kernels significantly reduce the number of unit crossbars (up to 95% reduction for 256x256) and maintain low rate loss (<2%) compared to 3D kernels.
• Combining 2D + 1D kernels with 3D kernels (ratio ~0.5) halves the required unit crossbars with minimal performance degradation.
• The 2D + 1D approach proves more efficient in terms of resource utilization for sub-image convolution.

Conclusions:

• The 2D + 1D convolution scheme is highly effective for optimizing memristor crossbar-based edge AI, drastically reducing hardware requirements.
• Hybrid approaches combining 2D + 1D and 3D kernels offer a balanced solution for performance and resource efficiency.
• Memristor crossbars with optimized convolution strategies present a promising path for advanced edge intelligence.