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Updated: Oct 1, 2025

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Growth of wafer-scale graphene-hexagonal boron nitride vertical heterostructures with clear interfaces for obtaining
Huihui Yang1,2, Gang Wang3, Yanming Guo4
1Institute for Advanced Ceramics, School of Materials Science and Engineering, Harbin Institute of Technology, Heilongjiang, Harbin, 150080, P. R. China. hupa@hit.edu.cn.
Abstract:
Two-dimensional (2D) integrated circuits based on graphene (Gr) heterostructures have emerged as next-generation electronic devices. However, it is still challenging to produce high-quality and large-area Gr/hexagonal boron nitride (h-BN) vertical heterostructures with clear interfaces and precise layer control. In this work, a two-step metallic alloy-assisted epitaxial growth approach has been demonstrated for producing wafer-scale vertical hexagonal boron nitride/graphene (h-BN/Gr) heterostructures with clear interfaces. The heterostructures maintain high uniformity while scaling up and thickening. The layer number of both h-BN and graphene can be independently controlled by tuning the growth process. Furthermore, conductance measurements confirm that electrical hysteresis disappears on h-BN/Gr field-effect transistors, which is attributed to the h-BN dielectric surface. Our work blazes a trail toward next-generation graphene-based analog devices.

