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Energy-Efficient III-V Tunnel FET-Based Synaptic Device with Enhanced Charge Trapping Ability Utilizing Both Hot Hole
Dae-Hwan Ahn1, Suman Hu1, Kyeol Ko1
1Korea Institute of Science and Technology (KIST) 5, 14-gil, Hwarang-ro, Seongbuk-gu, Seoul 02792, South Korea.
Abstract:
A charge trap device based on field-effect transistors (FET) is a promising candidate for artificial synapses because of its high reliability and mature fabrication technology. However, conventional MOSFET-based charge trap synapses require a strong stimulus for synaptic update because of their inefficient hot-carrier injection into the charge trapping layer, consequently causing a slow speed operation and large power consumption. Here, we propose a highly efficient charge trap synapse using III-V materials-based tunnel field-effect transistor (TFET). Our synaptic TFETs present superior subthreshold swing and improved charge trapping ability utilizing both carriers as charge trapping sources: hot holes created by impact ionization in the narrow bandgap InGaAs after being provided from the p+-source, and band-to-band tunneling hot electrons (BBHEs) generated at the abrupt p+n junctions in the TFETs. Thanks to these advances, our devices achieved outstanding efficiency in synaptic characteristics with a 5750 times faster synaptic update speed and 51 times lower sub-fJ/um2 energy consumption per single synaptic update in comparison to the MOSFET-based synapse. An artificial neural network (ANN) simulation also confirmed a high recognition accuracy of handwritten digits up to ∼90% in a multilayer perceptron neural network based on our synaptic devices.
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