A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity.

Area of Science:

• Neurotechnology
• Neuromorphic Engineering
• Materials Science

Background:

• Spiking neural networks (SNNs) offer a promising approach for energy-efficient computation.
• Integrating memristive devices with CMOS neurons presents challenges due to differing current ranges.

Purpose of the Study:

• To develop and experimentally validate a hybrid memristive crossbar SNN system.
• To address the current mismatch between memristors and CMOS neurons using a novel circuit.

Main Methods:

• Fabrication of a hybrid system using custom high-resistance state memristors and analogue CMOS neurons (180nm technology).
• Implementation of an on-chip compact current splitter circuit (MOS ladders) to attenuate currents by over 5 orders of magnitude.
• Experimental demonstration of SNN operation with a 1T1R synaptic crossbar and integrate-and-fire neurons.

Main Results:

• Successful experimental operation of the hybrid memristive crossbar SNN.
• Demonstration of effective current attenuation from micro-amperes to pico-amperes.
• Validation of one-shot winner-takes-all training and stochastic binary spike-timing-dependent-plasticity learning.

Conclusions:

• The developed hybrid system successfully integrates memristors and CMOS neurons for SNN applications.
• The proposed current splitter circuit is effective in overcoming significant current range differences.
• The system demonstrates potential for implementing advanced learning rules in neuromorphic hardware.