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A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection.
Qirui Ren1,2, Chengying Chen3, Danian Dong1,2
1The Key Laboratory of Microelectronics Device and Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China.
Sensors (Basel, Switzerland)
|August 26, 2022
Summary
This study introduces a novel analog front-end (AFE) for electroencephalogram (EEG) signal detection, featuring an RRAM-based filter for efficient analog signal analysis and achieving ultra-low power consumption.
Area of Science:
- Biomedical Engineering
- Analog Integrated Circuit Design
- Neuroscience Instrumentation
Background:
- Electroencephalogram (EEG) signal detection is crucial for neurological diagnostics.
- Existing EEG analog front-ends (AFEs) face challenges in power efficiency and analog domain signal analysis.
- Resistive Random-Access Memory (RRAM) offers bio-plausible characteristics suitable for efficient analog signal processing.
Purpose of the Study:
- To present a novel analog front-end (AFE) for electroencephalogram (EEG) signal detection.
- To integrate a Resistive Random-Access Memory (RRAM)-based low-pass Finite Impulse Response (FIR) filter into an EEG AFE for the first time.
- To achieve ultra-low power consumption for the developed EEG AFE.
Main Methods:
- The AFE comprises chopper-stabilized amplifiers, a ripple suppression circuit, an RRAM-based low-pass FIR filter, and an 8-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC).
- A symmetrical OTA structure was employed for the preamplifier to reduce power consumption.
- The RRAM-based filter was designed with a 40 Hz cutoff frequency, suitable for EEG analysis.
- A segmented capacitor structure was utilized in the SAR ADC to minimize power consumption.
Main Results:
- The RRAM-based low-pass FIR filter was successfully integrated into the EEG AFE, enabling efficient analog domain signal analysis.
- The ripple suppression circuit significantly improved noise characteristics and offset voltage.
- The chip prototype, designed in 40 nm CMOS technology, achieved an overall power consumption of approximately 13 µW.
- The designed AFE meets gain requirements while ensuring reduced power consumption.
Conclusions:
- The developed AFE represents a significant advancement in EEG signal detection technology.
- The integration of RRAM technology offers a novel and efficient approach for analog signal processing in biomedical applications.
- The ultra-low power consumption of the AFE makes it suitable for portable and long-term EEG monitoring systems.
