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Published on: June 23, 2018
A Multimodal CMOS Readout IC for SWIR Image Sensors with Dual-Mode BDI/DI Pixels and Column-Parallel Two-Step
Yuyan Zhang1,2, Zhifeng Chen1, Yaguang Yang3
1School of Opto-Electronic and Communication Engineering, Xiamen University of Technology, Xiamen 361024, China.
This study introduces a novel dual-mode analog front-end (AFE) for short-wave infrared (SWIR) image sensors, optimizing performance by dynamically switching between buffered-direct-injection (BDI) and direct-injection (DI) modes. This innovation balances power consumption with signal quality for advanced SWIR imaging applications.
Area of Science:
- Electrical Engineering and Computer Science
- Optoelectronics and Imaging Technology
Background:
- Short-wave infrared (SWIR) image sensors require efficient analog front-end (AFE) circuits for optimal performance.
- Existing readout integrated circuits (ROICs) face trade-offs between injection efficiency, bias stability, and power consumption.
- Direct-injection (DI) offers low power but suffers from instability, while buffered-direct-injection (BDI) improves stability at higher power costs.
Purpose of the Study:
- To propose and implement a novel dual-mode CMOS analog front-end (AFE) circuit for SWIR image sensors.
- To dynamically balance injection efficiency and power consumption in the ROIC through a hybrid readout circuit.
- To enhance the signal-to-noise ratio (SNR) and linearity of the analog-to-digital converter (ADC).
Main Methods:
- Developed a hybrid readout circuit (ROIC) with dynamically switchable buffered-direct-injection (BDI) and direct-injection (DI) modes.
- Implemented a dual-mode injection architecture using in-pixel mode-switching transistors and a low-leakage transmission gate.
- Integrated a 12-bit two-step single-slope analog-to-digital converter (TS-SS ADC) with a four-terminal comparator and dynamic reference voltage compensation.
Main Results:
- The dual-mode ROIC successfully balances injection efficiency and power consumption based on pixel current levels.
- The TS-SS ADC achieved improved SNR and linearity by mitigating charge leakage and offset.
- The prototype AFE, fabricated in a 0.18 µm CMOS process, demonstrated a dynamic range of 75.58 dB, noise of 249.42 μV, and power consumption of 81.04 mW.
Conclusions:
- The proposed dual-mode AFE circuit effectively addresses the performance trade-offs in SWIR image sensor ROICs.
- The hybrid readout architecture enables adaptive operation, optimizing for low-noise or low-power conditions.
- This design provides a significant advancement for SWIR imaging systems requiring high performance and efficiency.
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