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Low Buffer Trapping Effects above 1200 V in Normally off GaN-on-Silicon Field Effect Transistors
Idriss Abid1, Youssef Hamdaoui1, Jash Mehta1
1IEMN (Institute of Electronics, Microelectronics and Nanotechnology), Avenue Poincaré, 59650 Lille, France.
Abstract:
We report on the fabrication and electrical characterization of AlGaN/GaN normally off transistors on silicon designed for high-voltage operation. The normally off configuration was achieved with a p-gallium nitride (p-GaN) cap layer below the gate, enabling a positive threshold voltage higher than +1 V. The buffer structure was based on AlN/GaN superlattices (SLs), delivering a vertical breakdown voltage close to 1.5 kV with a low leakage current all the way to 1200 V. With the grounded substrate, the hard breakdown voltage transistors at VGS = 0 V is 1.45 kV, corresponding to an outstanding average vertical breakdown field higher than 2.4 MV/cm. High-voltage characterizations revealed a state-of-the-art combination of breakdown voltage at VGS = 0 V together with low buffer electron trapping effects up to 1.4 kV, as assessed by means of substrate ramp measurements.
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