Two dimensional semiconducting materials for ultimately scaled transistors
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Updated: Aug 26, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Tianyao Wei1,2, Zichao Han1, Xinyi Zhong3
1Institute of Optoelectronics, Fudan University, Shanghai 200438, People's Republic of China.
Abstract:
Two dimensional (2D) semiconductors have been established as promising candidates to break through the short channel effect that existed in Si metal-oxide-semiconductor field-effect-transistor (MOSFET), owing to their unique atomically layered structure and dangling-bond-free surface. The last decade has witnessed the significant progress in the size scaling of 2D transistors by various approaches, in which the physical gate length of the transistors has shrank from micrometer to sub-one nanometer with superior performance, illustrating their potential as a replacement technology for Si MOSFETs. Here, we review state-of-the-art techniques to achieve ultra-scaled 2D transistors with novel configurations through the scaling of channel, gate, and contact length. We provide comprehensive views of the merits and drawbacks of the ultra-scaled 2D transistors by summarizing the relevant fabrication processes with the corresponding critical parameters achieved. Finally, we identify the key opportunities and challenges for integrating ultra-scaled 2D transistors in the next-generation heterogeneous circuitry.
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