High-Performance CMOS Inverter Array with Monolithic 3D Architecture Based on CVD-Grown n-MoS₂ and p-MoTe₂

Area of Science:

• Materials Science
• Electrical Engineering
• Nanotechnology

Background:

• Advancements in 2D materials offer new possibilities for semiconductor devices.
• Developing high-density integrated circuits requires innovative transistor architectures.
• Complementary metal-oxide-semiconductor (CMOS) technology is fundamental to modern electronics.

Purpose of the Study:

• To fabricate a monolithic three-dimensional (3D) CMOS inverter array using 2D transition metal dichalcogenides.
• To investigate the performance and characteristics of vertically stacked n-MoS2 and p-MoTe2 field-effect transistors (FETs).
• To demonstrate the potential of 2D materials for high-density integrated circuit fabrication.

Main Methods:

• Large-scale n-MoS2 and p-MoTe2 were grown using chemical vapor deposition.
• Vertically stacked n- and p-channel FETs sharing a common gate electrode were fabricated.
• High-k HfO2 was used as the gate dielectric, with an Al2O3 seed layer for MoS2 protection.
• A p-MoTe2 FET was designed as the upper layer, leveraging ambient doping for higher hole density.
• An HfO2 capping layer was applied to optimize device performance.

Main Results:

• The fabricated CMOS inverter array demonstrated a typical voltage gain of approximately 4.2 and low power consumption of 0.11 nW at 1V.
• Statistical analysis revealed a high device yield of 60% and an average voltage gain of about 3.6 at 1V.
• The integration of 2D materials in a 3D stacked structure was successfully achieved.

Conclusions:

• This work successfully demonstrates the fabrication of a monolithic 3D CMOS inverter array using 2D semiconductors.
• The results highlight the significant advantages of 2D transition metal dichalcogenides for creating high-density integrated circuits.
• The developed fabrication process and device design show promise for future advanced electronic applications.