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Electronically Tunable Memristor Emulator Implemented Using a Single Active Element and Its Application in Adaptive

Sadaf Tasneem1, Pankaj Kumar Sharma1, Rajeev Kumar Ranjan1

  • 1Electronics Engineering Department, Indian Institute of Technology (Indian School of Mines) Dhanbad, Dhanbad 826004, Jharkhand, India.

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Summary
This summary is machine-generated.

A new 100 MHz flux-controlled memristor emulator is introduced, ideal for neuromorphic computing. This design utilizes readily available components and demonstrates robust, non-volatile memory characteristics for advanced applications.

Keywords:
DVCCMonte Carloadaptive learningmemristor emulatorpinched hysteresis loop (PHL)

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Area of Science:

  • Electronics and Electrical Engineering
  • Materials Science

Background:

  • Memristor emulators are crucial for advancing neuromorphic computing, analog signal processing, and computational tasks.
  • Existing memristor emulator designs often face limitations in frequency, stability, or component complexity.

Purpose of the Study:

  • To propose and validate a novel 100 MHz flux-controlled memristor emulator.
  • To demonstrate the emulator's suitability for neuromorphic applications through a practical circuit design.

Main Methods:

  • The emulator is designed using a single differential voltage current conveyor (DVCC), three PMOS transistors, and one capacitor.
  • Simulations were conducted using a 180 nm technology node, and experimental verification was performed using AD844AN and CD4007 integrated circuits.

Main Results:

  • The proposed emulator achieves a 100 MHz operating frequency and exhibits non-volatile memory behavior, retaining states without external power.
  • Robustness was confirmed through process, voltage, temperature (PVT), and Monte Carlo simulations, indicating resilience to variations.
  • A functional neuromorphic adaptive learning circuit was successfully implemented using the developed memristor emulator.

Conclusions:

  • The presented flux-controlled memristor emulator offers a high-frequency, non-volatile, and robust solution for neuromorphic and analog computing applications.
  • The design's simplicity and experimental validation make it a promising candidate for future integrated circuit development.