Efficient Convolutional Neural Networks for Semiconductor Wafer Bin Map Classification.

Area of Science:

• Semiconductor Manufacturing
• Artificial Intelligence
• Computer Vision

Background:

• Wafer maps visualize chip functionality, with defect patterns offering insights into manufacturing issues.
• Automating defect pattern classification is crucial for efficient semiconductor manufacturing but requires speed and resource optimization.

Purpose of the Study:

• To develop an efficient convolutional neural network (CNN) model for classifying wafer map defect patterns.
• The goal is to achieve high accuracy with reduced computational resources and faster processing times.

Main Methods:

• Utilized the WM-811K open dataset containing nine common defect patterns.
• Compared lightweight CNN models including EfficientNetV2, ShuffleNetV2, MobileNetV2, and MobileNetV3 for classification.
• Evaluated models based on performance, resource usage (parameters), and processing speed (training/inference).

Main Results:

• MobileNetV3 demonstrated superior efficiency, using 7.5x fewer parameters than ResNet.
• Achieved 98% accuracy and an 89.5% F1 score, comparable to larger models.
• Exhibited significantly faster training (7.2x) and inference (4.9x) speeds.

Conclusions:

• MobileNetV3 is a highly effective and efficient model for wafer map defect pattern classification.
• This approach enables deployment in actual manufacturing systems without requiring high-performance hardware.
• The study validates the use of lightweight CNNs for resource-constrained defect analysis in semiconductor production.