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Multimachine stability analysis is crucial for understanding the dynamics and stability of power systems with multiple synchronous machines. The objective is to solve the swing equations for a network of M machines connected to an N-bus power system.
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A parallel-plate capacitor with capacitance C, whose plates have area A and separation distance d, is connected to a resistor R and a battery of voltage V. The current starts to flow at t = 0. What is the displacement current between the capacitor plates at time t? From the properties of the capacitor, what is the corresponding real current?
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Deep Learning Accelerators' Configuration Space Exploration Effect on Performance and Resource Utilization: A Gemmini

Dennis Agyemanh Nana Gookyi1, Eunchong Lee2, Kyungho Kim2

  • 1Electronics Division, Institute for Scientific and Technological Information, Council for Scientific and Industrial Research, Accra, Ghana.

Sensors (Basel, Switzerland)
|March 11, 2023
PubMed
Summary

Gemmini, an open-source tool, accelerates deep learning (DL) hardware exploration. It shows weight-stationary dataflow offers a 3x speedup over output-stationary, and hardware image-to-column (im2col) improves performance by 1.1x compared to CPU.

Keywords:
FPGAGEMMGemminideep learninghardware acceleratorsimage-to-columnopen-sourceoutput/weight stationary dataflowsystolic array

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Area of Science:

  • Computer Engineering
  • Artificial Intelligence Hardware

Background:

  • Designing custom deep learning (DL) hardware accelerators for edge computing is challenging.
  • Open-source frameworks aid in exploring DL hardware accelerator designs.

Purpose of the Study:

  • To detail hardware/software components generated by Gemmini, an open-source DL accelerator generator.
  • To explore general matrix-to-matrix multiplication (GEMM) dataflow options and their performance.
  • To evaluate accelerator parameters on FPGA for area, frequency, and power.

Main Methods:

  • Utilized Gemmini to explore different dataflow options (output/weight stationary) for GEMM.
  • Implemented Gemmini hardware on an FPGA.
  • Analyzed the impact of array size, memory capacity, and CPU/hardware image-to-column (im2col) on performance and resource utilization.

Main Results:

  • Weight-stationary (WS) dataflow achieved a 3x performance speedup over output-stationary (OS) dataflow.
  • Hardware im2col operation provided a 1.1x speedup compared to CPU implementation.
  • Doubling array size increased area and power by 3.3x; im2col module increased area by 1.01x and power by 1.06x.

Conclusions:

  • Gemmini facilitates efficient DL accelerator design and exploration.
  • WS dataflow and hardware im2col are key optimizations for DL inference acceleration.
  • Trade-offs between accelerator size, performance, and resource consumption are quantifiable.