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Published on: November 1, 2013
Highly parallel stateful Boolean logic gates based on aluminum-doped self-rectifying memristors in a vertical
Taegyun Park1, Seung Soo Kim1, Byeol Jun Lee1
1Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, Seoul National University, Seoul 08826, Republic of Korea. cheolsh@snu.ac.kr.
Self-rectifying memristors enable electroforming-free, low-power, high-density memory. Vertical array configurations facilitate efficient in-memory computing and novel parallel logic gates for complex Boolean functions.
Area of Science:
- Materials Science
- Electrical Engineering
- Computer Science
Background:
- Memristors offer unique resistive switching properties for advanced electronics.
- Existing memristor logic gates face limitations in density and parallelism.
- In-memory computing demands efficient, high-density, and parallel processing architectures.
Purpose of the Study:
- To develop and demonstrate a novel stateful logic gate using self-rectifying memristors.
- To explore the advantages of vertical array structures for enhanced memory density and parallelism.
- To implement basic and composite Boolean logic functions for in-memory computing applications.
Main Methods:
- Utilizing self-rectifying memristors with electronic bipolar resistive switching.
- Configuring memristors in a vertical crossbar array (CBA) architecture.
- Exploiting a non-filamentary switching mechanism to realize Boolean logic gates (AND, OR, XOR).
Main Results:
- Demonstrated electroforming-free, highly rectifying memristors with low operating power.
- Achieved higher memory density using vertical array structures compared to planar arrays.
- Successfully implemented AND, OR, and exclusive OR (XOR) logic gates, enabling complex Boolean function realization.
- Proposed a memristive priority encoder design leveraging parallel logic gates.
Conclusions:
- Self-rectifying memristors in vertical arrays offer a promising platform for efficient in-memory computing.
- The demonstrated logic gates and architecture enable high parallelism and potential for implementing any canonical Boolean expression.
- Future work should focus on improving switching speed for practical applications, though increased parallelism can compensate for lower speeds.
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