A 510 μW 0.738-mm ² 6.2-pJ/SOP Online Learning Multi-Topology SNN Processor With Unified Computation Engine in 40-nm...

Area of Science:

• Neuromorphic Engineering
• Artificial Intelligence
• Low-Power Computing

Background:

• Edge AI deployment faces power and area constraints with conventional neural networks (NNs).
• Spiking Neural Networks (SNNs) offer a low-power alternative but struggle with topology adaptability and online learning on edge processors.
• Existing SNN processors lack flexibility for diverse network architectures and on-device learning capabilities.

Purpose of the Study:

• To develop a reconfigurable neuromorphic engine (RAINE) for edge devices that supports multiple SNN topologies.
• To integrate an efficient online learning algorithm for adaptive edge AI.
• To demonstrate ultra-low power consumption and high reconfigurability for SNNs on a hardware prototype.

Main Methods:

• Design and implementation of RAINE, a neuromorphic engine featuring sixteen Unified-Dynamics Learning-Engines (UDLEs).
• Integration of a trace-based rewarded spike-timing-dependent plasticity (TR-STDP) learning algorithm for online adaptation.
• Development and analysis of topology-aware data reuse strategies for efficient SNN mapping.
• Fabrication of a 40-nm prototype chip and experimental validation with diverse SNN applications.

Main Results:

• RAINE achieves an energy-per-synaptic-operation (SOP) of 6.2 pJ/SOP at 0.51 V and 510 μW power consumption at 0.45 V.
• Demonstrated ultra-low energy consumption for Spiking Recurrent Neural Network (SRNN), Spiking Convolutional Neural Network (SCNN), and MNIST digit recognition tasks.
• Successful implementation of multiple SNN topologies including SRNN, SCNN, and end-to-end on-chip learning.

Conclusions:

• RAINE effectively addresses the challenges of reconfigurability and power efficiency in edge SNN processors.
• The proposed architecture and learning algorithm enable versatile and adaptive AI on resource-constrained edge devices.
• The fabricated prototype validates the feasibility of simultaneous high reconfigurability and ultra-low power consumption for SNNs.