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An 8-Channel Ambulatory EEG Recording IC With In-Channel Fully-Analog Real-Time Motion Artifact Extraction and

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    This study introduces an 8-channel electroencephalogram (EEG) integrated circuit that removes motion artifacts on-chip. This novel design offers low power consumption and improved scalability for brain-computer interfaces.

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    Area of Science:

    • Biomedical Engineering
    • Integrated Circuit Design
    • Neuroscience

    Background:

    • Motion artifacts significantly degrade electroencephalogram (EEG) signal quality.
    • Existing artifact removal methods often require complex digital signal processing (DSP) and high-resolution analog-to-digital converters (ADCs).
    • On-chip artifact removal is crucial for developing portable and scalable EEG systems.

    Purpose of the Study:

    • To design and characterize an 8-channel EEG recording integrated circuit (IC) with on-chip, in-channel motion artifact extraction and removal.
    • To implement a novel dual-path feed-forward analog-domain method for artifact management, eliminating the need for DSP.
    • To achieve low power consumption and high scalability in EEG acquisition systems.

    Main Methods:

    • An 8-channel EEG recording IC was designed and fabricated using 0.13 μm CMOS technology.
    • A dual-path feed-forward analog circuit architecture was developed for on-chip artifact extraction and removal.
    • Experimental characterization included analysis of electrode-skin interface properties and detailed circuit performance evaluation.

    Main Results:

    • The IC achieved an amplification voltage gain of 48.3 dB and a bandwidth of 300 Hz.
    • The system demonstrated rail-to-rail input DC offset tolerance and 41.5 dB artifact suppression.
    • Each channel consumed only 55 μW, representing the lowest reported power consumption for motion artifact detection/removal ICs.

    Conclusions:

    • The proposed analog-domain, on-chip artifact removal architecture effectively suppresses EEG motion artifacts.
    • The design offers significant advantages in terms of power efficiency, scalability, and reduced system complexity compared to state-of-the-art methods.
    • This work paves the way for more robust and compact wearable EEG systems.