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Investigation of the Connection Schemes between Decks in 3D NAND Flash
Jianquan Jia1,2, Lei Jin1,2, Kaikai You1,2
1Institute of Microelectronics of the Chinese Academy of Sciences, Beijing 100029, China.
Micromachines
|September 28, 2023
Summary
Dual-deck stacking in 3D NAND flash improves storage density but impacts cell reliability. Connection schemes without poly-plugs cause cell breakdown, while poly-plug schemes reduce channel current and increase variation.
Area of Science:
- Materials Science
- Electrical Engineering
- Semiconductor Physics
Background:
- 3D NAND flash technology utilizes dual-deck stacking to increase storage density.
- The connection scheme between decks is critical for dual-deck structure reliability.
- Deep hole etching challenges in 3D NAND flash necessitate advanced stacking solutions.
Purpose of the Study:
- To investigate the impact of different inter-deck connection schemes on 3D NAND flash cell reliability.
- To analyze the electrical characteristics and failure mechanisms associated with various connection strategies.
- To propose reliability enhancement methods for dual-deck 3D NAND flash.
Main Methods:
- Experimental data analysis of cell reliability metrics.
- Simulation analysis of electric field distribution and current flow.
- Investigation of structural changes and process impacts on cell integrity.
Main Results:
- Connection schemes without poly-plugs lead to local electric field enhancement, causing gate channel breakdown and data retention issues in lower-deck top cells.
- These cells suffer structural damage from secondary etching due to alignment errors.
- Poly-plug connection schemes reduce channel saturation current and increase current variation due to shielding effects on channel inversion.
Conclusions:
- For non-poly-plug schemes, increasing inter-deck oxide thickness and using virtual cells can improve reliability.
- For poly-plug schemes, N-type doping of the plug is proposed to mitigate current anomalies and improve device performance.
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